High bandwidth memory (HBM) is DRAM built as a tower. Eight, twelve or sixteen memory dies sit on top of a logic base die, wired together vertically, and the whole stack is placed a few millimetres from a GPU or AI accelerator inside the same package. The reason is bandwidth. One HBM4 stack moves at least 2 terabytes per second, more than three times what a 12-channel DDR5-6400 server socket manages (about 614 GB/s).

Hybrid bonding joins two chips by pressing their polished faces together so that copper pads on one fuse directly with copper pads on the other. There is no solder, no bump and no gap. The name comes from the two bonds made at once: the insulating surfaces stick to each other, and the embedded copper pads weld into continuous metal. Because nothing sits between the dies, connections can be packed far closer together than solder allows, and stacks get thinner and cooler.

A laptop review is not usually a memory-cycle datapoint. This one is. The Framework Laptop 13 Pro drew strong marks for performance, build quality, and keyboard, and was marked down on a single dimension — it is expensive, and the review attributes that expense to high RAM prices. That sentence is the cleanest publicly visible evidence to date that high-bandwidth memory wafer allocation has stopped being a datacenter accounting problem and started setting bills of materials on consumer hardware.

I’ve defended Micron against its rivals often enough that I don’t reach for the company’s press office as a source of good faith. Legacy chipmakers cry protectionism every time a customer finds a cheaper part, and most of the time the complaint is about margin, not national security. Every instinct I have says discount this warning too. I can’t. Not this time. Apple’s pitch to the Trump administration — sourcing Chinese memory for products sold outside the United States — has been framed as a carve-out, a geographic footnote that leaves the domestic industry untouched.

Every dollar of AI capital expenditure eventually lands somewhere concrete: a wafer, a switch, a cooling loop, a power purchase agreement, a SaaS seat. Tracking that flow from the hyperscaler earnings call down to the individual equity ticker is the only way to separate durable exposure from sentiment-driven noise. The chain below runs twelve tiers deep rather than the usual eleven, because the packaging layer that sits between memory and networking has become too structurally important to leave folded into a generic equipment bucket.